Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. The processor needs to execute the interrupt service routine (ISR) to serve this interrupt. The following steps (not necessarily in order) are taken by the processor when the interrupt arrives:
i. The processor saves the content of the program counter.
ii. The program counter is loaded with the start address of the ISR.
iii. The processor finishes the present instruction.
Which ONE of the following is the CORRECT sequence of steps?
A. (iii), (i), (ii)
B. (i), (iii), (ii)
C. (iii), (ii), (i)
D. (i), (ii), (iii)
GATE 2025 · Computer Organization and Architecture · Interrupts · medium
Answer: Option A: (iii), (i), (ii) — Finish current instruction, save PC, load PC with ISR address.
Why step (iii) must come first: The interrupt is asynchronous, but the CPU only samples it at instruction boundaries. It must finish the in-progress instruction first. If it abandoned execution mid-instruction, register values and condition flags would be in an indeterminate state, making context save meaningless.
Why step (i) must come second: Once the current instruction is complete, the PC holds the address of the NEXT instruction to resume after the ISR. This return address must be saved (typically pushed onto a stack) before loading the PC with the ISR address. Otherwise the return address is lost.
Why step (ii) must come last: Only after saving the old PC is it safe to overwrite the PC with the ISR start address. This is the final step that transfers control to the ISR.