Many of the advanced microprocessors prefetch instructions and store them in an instruction buffer to speed up processing. This speed up is achieved because ________
Answer: The speedup is achieved because the CPU can overlap instruction fetch (from memory into the buffer) with instruction execution. While the current instruction executes, the next instruction is already being fetched. This hides memory access latency and keeps the execution unit continuously busy, increasing throughput.
Identify the bottleneck without prefetching: Without prefetching, instruction fetch from memory and instruction execution are purely sequential: the CPU fetches an instruction, then executes it, then fetches the next, etc. During fetch, the execution unit is idle. During execution, the memory bus is idle. This sequential model wastes half the available resources.
Explain how prefetch buffer enables overlap: With an instruction prefetch buffer: while the CPU is executing instruction I, the memory interface prefetches instruction I+1 (and possibly I+2, I+3...) into the buffer. When execution of I completes, I+1 is immediately available in the buffer — no memory wait. The fetch and execute phases now overlap (pipeline), reducing the effective time per instruction.